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MK ya ba da rahoton Nvidia yana shirin tallafin RISC-V don sabar AI da zanga-zangar CUDA ta farko ta jama'a.

Jaridar Maeil Business Newspaper ta ba da rahoton cewa Nvidia yana haɓaka dabarun sabar CPU na AI-server don haɗawa da RISC-V, tare da x86 da Arm, kuma SiFive zai nuna CUDA a bainar jama'a yana gudana akan CPU na tushen RISC-V.

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Source-provided image accompanying MK reports Nvidia plans RISC-V support for AI servers and a first public CUDA demonstration
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Maeil Business Newspaper reports that Nvidia is preparing support for RISC-V-based CPUs in its AI-server platform, adding another CPU architecture alongside x86 and Arm. The report says Nvidia has prepared requirements for CUDA and NVLink Fusion to operate with RISC-V systems and that SiFive is scheduled to demonstrate CUDA on a RISC-V-based CPU at Hot Chips 2026.

Maeil Business Newspaper reports that Nvidia unveiled a strategy to expand the CPU architectures supported by its AI-server platform to RISC-V. The article places the move alongside Nvidia’s existing support for x86 and Arm, which it describes as the leading CPU architectures in AI servers. RISC-V is described in the report as an open CPU design method that can be used by multiple companies.

The report attributes the announcement to Nvidia senior engineer Frans Sistermans at the Hot Chips 2026 semiconductor conference at Stanford University on Aug. 23 local time. According to MK, Sistermans said RISC-V would become a new server-CPU option after x86 and Arm and that Nvidia would expand support for more CPU companies using its AI platforms. These statements are reported by MK and are not independently confirmed here.

MK reports that Nvidia has prepared requirements for CUDA, its GPU development platform, and NVLink Fusion, its AI-server connection technology, to operate on RISC-V-based CPUs. The report frames this as an effort to make Nvidia’s broader AI platform available across a wider set of processor designs. It does not provide technical specifications for the requirements or explain whether they apply equally to all RISC-V implementations.

The article also reports that Nvidia is expanding cooperation with SiFive, describing the company as an NVLink Fusion partner alongside Arm, Intel, and Fujitsu. MK says SiFive will hold a public demonstration at Hot Chips showing CUDA running on a RISC-V-based CPU for the first time. The source does not state the demonstration’s exact date, system configuration, workload, results, or whether the software will be released for general use.

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The reported move could broaden the range of CPUs that can be paired with Nvidia’s AI infrastructure and give server-chip designers more architectural choice. It also tests whether Nvidia’s software and interconnect ecosystem can extend beyond the dominant x86 and Arm platforms. The report does not independently establish the demonstration’s performance, commercial availability, or the number of future RISC-V server products.

CPU choice matters because AI servers combine processors with accelerators, memory, networking, and software. Nvidia’s reported RISC-V support would address the processor layer while keeping CUDA and NVLink Fusion central to the system. If implemented broadly, that could let more chip designers build CPUs intended to work with Nvidia-based AI infrastructure without relying exclusively on x86 or Arm licensing and ecosystems.

The practical significance depends on how much support Nvidia provides beyond a basic compatibility layer. A useful server platform would require reliable operating-system support, compilers, libraries, debugging tools, system management, and interoperability with the rest of the data-center stack. MK reports the existence of requirements for CUDA and NVLink Fusion, but it does not establish the scope, maturity, or completeness of that support.

For Nvidia, a wider CPU ecosystem could increase the number of companies able to participate in systems built around its AI accelerators and networking technology. For RISC-V companies, compatibility with CUDA could improve access to AI-server designs where Nvidia software remains important. Those possibilities are implications of the reported strategy, not outcomes demonstrated by the source.

The development may also affect concentration and bargaining power in AI infrastructure. More CPU options could create room for regional, specialized, or custom server processors, but Nvidia’s platform remains a potential gatekeeper if access to CUDA or NVLink Fusion is controlled through its own technical requirements. The source provides no information about pricing, licensing, performance, customer commitments, or expected market share, so the competitive impact remains uncertain.

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The immediate point to watch is whether SiFive’s announced demonstration runs successfully and what functionality it covers. Longer term, customers and chip companies will need evidence about compatibility, performance, software support, security, supply, and deployment timelines. Nvidia’s role in enabling or limiting access to CUDA and NVLink Fusion will also shape whether RISC-V becomes a practical option for AI servers.

The first verification point is the SiFive demonstration described by MK. Observers should look for the specific RISC-V processor used, the CUDA components that run, the workload tested, and any independently reproducible results. A demonstration would show technical feasibility, but it would not by itself establish production readiness or performance parity with x86- or Arm-based systems.

The next issue is availability. Nvidia and its partners would need to clarify whether RISC-V support is experimental, available to selected partners, or ready for commercial server products. The source does not provide a release schedule, product list, customer list, or deployment commitment. It also does not say whether existing CUDA applications can run without modification.

System-level performance will matter more than a successful software launch. Relevant evidence would include accelerator utilization, , power consumption, memory and I/O behavior, reliability, and performance on real AI workloads. None of those measurements is supplied in the MK report, so claims that RISC-V will improve efficiency or reduce costs would require additional evidence.

Finally, watch how Nvidia defines its relationships with SiFive, Arm, Intel, and Fujitsu and whether other RISC-V companies join the ecosystem. The key questions are whether support is open enough to encourage multiple suppliers, whether server manufacturers adopt the architecture, and whether customers see a reason to choose it. At present, MK reports an announced direction and a planned public demonstration, not a completed industry transition.

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