引导式测验 · 中等 等级
Cerebras 系统测验
解释晶圆级集成、晶圆上通信、冗余以及特定于版本的 WSE-3 和 CS-4 产品详细信息。
问题 1 的 8
Cerebras 晶圆级发动机的设计有何不同寻常之处?
预览每个问题8 问题
当您参加测验时,就会出现答案和解释。
- Cerebras 晶圆级发动机的设计有何不同寻常之处?
- 它是一个构建在单个全硅晶圆上的完整处理器
- 它是世界上最小的AI芯片
- 它完全无需电力即可运行
- 它由塑料而不是硅制成
- 为什么将所有核心保留在一块晶圆上有助于提高 AI 性能?
- 它使芯片的运输成本更便宜
- 数据通过快速的片上线路而不是缓慢的外部网络传输
- 它消除了对任何软件的需要
- 它允许芯片漂浮在液体中
- WSE-3 大约包含多少个晶体管?
- 约4千
- 约400万
- 约4万亿
- 约400个
- What is one Cerebras system-level capability advertised for its CS-4 rack-scale system?
- It uses only a single CPU and no AI accelerator
- It replaces every model with a database
- It guarantees the same speedup on every workload
- It combines multiple wafer-scale processors in a rack-scale platform
- Cerebras 如何处理如此巨大芯片上的制造缺陷?
- 它使用冗余核心和布线来解决缺陷点
- 它会丢弃所有有缺陷的晶圆
- 它忽略缺陷并运送破损的芯片
- 它手工修复每个晶体管
- What are the WSE-3 specifications Cerebras reports in its product materials?
- Four billion transistors and 900 cores
- Four trillion transistors and about 900,000 AI-optimized cores
- One thousand transistors and one million CPU sockets
- A fixed count of parameters for every model
- How can a wafer-scale processor route around manufacturing defects?
- Assume every fabricated core is perfect
- Move all computation to a hard drive
- Use redundant cores and routing so defective regions can be bypassed
- Rebuild the silicon after deployment
- Why can on-wafer memory and communication benefit some AI workloads?
- They eliminate every computation bottleneck
- They make all models fit in one core
- They guarantee lower latency for every task
- They can reduce data movement between separately packaged processors and memory