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Semifive, a global provider of custom AI ASIC solutions, signed a contract worth roughly KRW 70.3 billion (US $52 million) with an unnamed U.S.‑based AI fabless company to develop a next‑generation AI inference accelerator. The deal represents more than 40 % of Semifive’s total orders for 2025 and about 60 % of new orders booked in the first half of 2026, making it the company’s largest single contract to date. Under Semifive’s “Spec Hand‑off” model, the customer supplies performance specifications while Semifive handles full‑stack development, including design, software, packaging, testing, and mass production. The accelerator will use LPDDR6 memory and PCIe Gen5 interfaces, target high memory bandwidth, low power consumption, and reduced total cost of ownership. Tape‑out is planned for the first half of 2027, with mass production slated for 2028 aimed at hyperscalers and cloud service providers.
Semifive’s press release states the contract is valued at KRW 70.3 billion (approximately US $52 million) and is the company’s first "Spec Hand‑off" engagement in the North American market. The agreement accounts for over 40 % of the firm’s total order book for 2025 and roughly 60 % of the new orders recorded in the first half of 2026.
The Spec Hand‑off model differs from traditional turnkey engagements by allowing the customer to provide only high‑level performance specifications, while Semifive assumes responsibility for detailed chip design, software development, packaging, testing, and eventual mass production. This approach aims to reduce time‑to‑market and development risk for the fabless partner.
Technical highlights include the integration of LPDDR6 memory to lower power consumption associated with memory accesses, and PCIe Gen5 interfaces to alleviate data‑transfer bottlenecks. Semifive also plans to leverage its experience with large‑die (up to 800 mm²) projects to deliver high compute throughput and operational stability.
The development timeline targets a tape‑out in the first half of 2027, followed by global mass production in 2028. The accelerator is intended for deployment by hyperscale cloud service providers and other large‑scale AI inference workloads.
Awọn alaye orisun: prnewswire.com ↗
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The contract underscores the growing demand for custom AI silicon optimized for large‑scale model inference, a market segment traditionally dominated by in‑house designs at firms like Google and Amazon. By securing a sizable North American deal, Semifive expands its footprint beyond Asia and positions itself as a viable partner for U.S. hyperscale cloud operators seeking to lower inference costs and power usage. The use of LPDDR6 and PCIe Gen5 reflects industry trends toward higher bandwidth and energy‑efficient memory solutions, which could influence future ASIC design standards. If the accelerator meets its performance targets, it may provide a cost‑effective alternative to existing offerings from established ASIC vendors, potentially reshaping the competitive dynamics of the AI hardware supply chain.
Custom AI ASICs are increasingly critical for reducing the cost and energy footprint of large language model inference. By securing a major contract with a U.S. fabless firm, Semifive demonstrates its ability to compete for high‑value design work outside its traditional Asian market.
The contract’s size relative to Semifive’s overall order book highlights the strategic importance of the North American AI hardware market and suggests that customers are seeking alternatives to the dominant players that have historically controlled AI silicon supply chains.
Adoption of LPDDR6 and PCIe Gen5 aligns with industry moves toward higher bandwidth, lower‑power memory subsystems, potentially setting a new for future AI inference chips.
If successful, the accelerator could provide cloud providers with a more cost‑effective solution for serving AI workloads, influencing pricing and performance expectations across the AI inference ecosystem.
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What did neural scaling law research (e.g. Kaplan et al., 2020) observe?
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Key milestones to monitor include the scheduled tape‑out in early 2027 and the commencement of mass production in 2028. Observers should watch for announcements of the unnamed U.S. fabless partner, which could reveal which cloud providers or AI workloads the accelerator will serve. Additionally, any performance benchmarks or power‑efficiency data released by Semifive will indicate whether the chip can compete with incumbent solutions from companies like Nvidia, Broadcom, or Marvell. Finally, the broader market response—such as interest from other hyperscalers or potential follow‑on contracts—will signal the commercial viability of Semifive’s Spec Hand‑off model in North America.
The scheduled tape‑out in early 2027 will be a key technical milestone; any delays or design changes could affect the projected 2028 mass‑production timeline.
Identification of the U.S. fabless partner will clarify which hyperscalers or AI service providers are likely to adopt the accelerator, offering insight into market demand.
Performance and power‑efficiency benchmarks released after tape‑out will be essential for assessing competitiveness against existing solutions from Nvidia, Broadcom, Marvell, and other ASIC vendors.
Potential follow‑on contracts or additional orders from other North American customers will indicate whether Semifive’s Spec Hand‑off model gains broader acceptance in the region.