ガイド連動クイズ · ハード レベル
AI in Semiconductor Fab Yield Optimization Quiz
Tests wafer map pattern classification, virtual metrology from tool sensor data, and run-to-run process control in chip fab yield work.
質問 1 の 8
ガイド連動クイズ · ハード レベル
Tests wafer map pattern classification, virtual metrology from tool sensor data, and run-to-run process control in chip fab yield work.