What happened
Semifive announced a $52 million agreement with an unnamed US‑based AI fabless company to create a custom AI chip that will be marketed to hyperscalers and cloud service providers.
Semifive, a South Korean ASIC company, disclosed that it has signed a $52 million contract with a US‑based AI fabless firm whose identity was not revealed. The agreement is described by Semifive as its largest to date and accounts for about 60 % of the company’s $88 million new‑order revenue recorded in the first half of 2026.
The partnership will follow Semifive’s “Spec Hand‑off” model, wherein the customer supplies performance specifications early in the design cycle. Semifive will then handle the full development process—including chip design, software stack, packaging, testing, and mass production—based on those specifications.
The accelerator will incorporate LPDDR6 memory to lower power consumption and PCIe Gen5 for high‑throughput data transfers. Semifive aims to deliver a design that balances high compute throughput with operational stability, targeting hyperscale data‑center operators and cloud service providers.
Source details: datacenterdynamics.com ↗
Why it matters
The deal represents roughly 60 % of Semifive’s new‑order revenue for the first half of 2026, signalling strong demand for custom silicon optimized for large‑scale AI workloads and highlighting the growing importance of “Spec Hand‑off” development models that give chip makers earlier design input.
The contract underscores the accelerating shift toward custom AI silicon, as large‑scale AI models increasingly require specialized hardware to manage cost and performance constraints.
By securing a deal that represents a majority of its new‑order , Semifive demonstrates its growing relevance in the AI hardware ecosystem and its ability to attract high‑value customers despite competition from established players.
The use of LPDDR6 and PCIe Gen5 reflects broader industry trends toward lower‑power, higher‑bandwidth memory solutions, which could improve the economics of AI at scale and influence future chipset roadmaps.
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What to watch next
Key milestones include the planned tape‑out in the first half of 2027, mass production in 2028, and the adoption of LPDDR6 memory and PCIe Gen5 interfaces, which could set new efficiency benchmarks for AI hardware.
The timeline for tape‑out (first half of 2027) and mass production (2028) will be closely monitored to gauge Semifive’s ability to meet schedule commitments.
Adoption rates among hyperscalers and cloud service providers will indicate market acceptance of the Spec Hand‑off development approach and the performance benefits of the new accelerator.
Potential follow‑on contracts or additional partnerships with other AI firms could further validate the technology and expand Semifive’s footprint in the AI accelerator market.