AI in Chip Floorplanning and Design Quiz

Answers and explanations appear as you take the quiz.

1. What physical decision does chip floorplanning or placement make?
   • Only the chip’s retail selling price
   • Only its package color
   • Only the company name on the box
   • Where circuit components occupy locations on the chip canvas
2. How should the cited paper’s report of competitive floorplans produced in hours be interpreted?
   • As a result for its studied setup, netlists and comparisons
   • As proof that every chip can be fully signed off in the same time
   • As a guarantee of global optimality for all circuits
   • As an architecture-independent law about every design tool
3. How does the AI frame the placement problem?
   • As a single one-shot guess
   • As a sequential decision: place one block, observe, then place the next
   • As a cooking recipe
   • As a spreadsheet sort
4. What is the 'netlist' that a graph neural network learns from?
   • A list of network passwords
   • A fishing net design
   • The graph of components and how they are connected
   • The internet routing table
5. Which fast objective signals are documented by the cited Circuit Training project?
   • Proxy wirelength, congestion and density
   • A proof of all manufacturing and timing requirements
   • Only the product’s market price
   • Only a mandatory social-media popularity score
6. In Google’s cited 2020 method description, what places standard-cell clusters after the RL macro placements?
   • Only an unchanged alphabetical component sort
   • Only a user-interface screenshot
   • A guarantee that no standard cells remain
   • A force-directed procedure
7. For pins at (0,0),(4,0),(4,3), what is the half-perimeter wirelength estimate in coordinate units?
   • 14
   • 12
   • 7
   • 4
8. What does the documented can_place_node check evaluate for a proposed grid location?
   • Whether the entire chip is globally optimal
   • Whether the node can be placed there under relevant location constraints
   • Whether every final routed timing path passes signoff
   • Whether the model’s prediction is a factual-confidence probability