AI in Semiconductor Fab Yield Optimization Quiz

Answers and explanations appear as you take the quiz.

1. What does 'yield' mean in semiconductor manufacturing?
   • The number of wafers a fab processes per day
   • The fraction of dies on a wafer that work
   • The thickness of deposited films
   • The speed of a finished chip
2. What does virtual metrology do?
   • Designs chip layouts automatically
   • Predicts measurement results from tool sensor data for every wafer
   • Replaces all inspection tools with cameras
   • Simulates customer demand for chips
3. An edge-ring pattern on a wafer map most likely points to what?
   • A problem affecting the wafer edge during a process like etching
   • A software bug in the test program
   • A random particle in the center
   • A customer design error
4. What is the WM-811K dataset used for?
   • Training chip layout generators
   • Research on classifying wafer map defect patterns
   • Forecasting semiconductor prices
   • Measuring transistor speed
5. Why do virtual metrology models need frequent recalibration?
   • Sensors stop recording data after a year
   • Maintenance, chamber aging and tool differences shift the data distribution
   • Regulators require monthly retraining
   • Models forget their weights overnight
6. What does a run-to-run controller do?
   • Schedules staff shifts
   • Adjusts recipe settings between lots to keep results on target
   • Classifies SEM images of defects
   • Tests finished chips for speed
7. Why do teams add an explicit 'unknown' class to wafer map classifiers?
   • To speed up training
   • So new patterns are flagged instead of forced into a known label
   • Because the law requires it
   • To reduce the number of test wafers
8. Which statement about fab training data is accurate?
   • Every defect type has millions of labeled examples
   • Rare defects may appear only a few times and classes are heavily imbalanced
   • Labels are generated automatically with no expert input
   • Fabs share all data publicly